ghc-8.8.2: The GHC API
Safe HaskellNone
LanguageHaskell2010

RegAlloc.Liveness

Synopsis

Documentation

type RegSet = UniqSet Reg #

type RegMap a = UniqFM a #

emptyRegMap :: UniqFM a #

type BlockMap a = LabelMap a #

mapEmpty :: IsMap map => map a #

type LiveCmmDecl statics instr = GenCmmDecl statics LiveInfo [SCC (LiveBasicBlock instr)] #

A top level thing which carries liveness information.

data InstrSR instr #

The register allocator also wants to use SPILL/RELOAD meta instructions, so we'll keep those here.

Constructors

Instr instr

A real machine instruction

SPILL Reg Int

spill this reg to a stack slot

RELOAD Int Reg

reload this reg from a stack slot

Instances

Instances details
Outputable instr => Outputable (InstrSR instr) # 
Instance details

Defined in RegAlloc.Liveness

Methods

ppr :: InstrSR instr -> SDoc #

pprPrec :: Rational -> InstrSR instr -> SDoc #

Instruction instr => Instruction (InstrSR instr) # 
Instance details

Defined in RegAlloc.Liveness

Methods

regUsageOfInstr :: Platform -> InstrSR instr -> RegUsage #

patchRegsOfInstr :: InstrSR instr -> (Reg -> Reg) -> InstrSR instr #

isJumpishInstr :: InstrSR instr -> Bool #

jumpDestsOfInstr :: InstrSR instr -> [BlockId] #

patchJumpInstr :: InstrSR instr -> (BlockId -> BlockId) -> InstrSR instr #

mkSpillInstr :: DynFlags -> Reg -> Int -> Int -> InstrSR instr #

mkLoadInstr :: DynFlags -> Reg -> Int -> Int -> InstrSR instr #

takeDeltaInstr :: InstrSR instr -> Maybe Int #

isMetaInstr :: InstrSR instr -> Bool #

mkRegRegMoveInstr :: Platform -> Reg -> Reg -> InstrSR instr #

takeRegRegMoveInstr :: InstrSR instr -> Maybe (Reg, Reg) #

mkJumpInstr :: BlockId -> [InstrSR instr] #

mkStackAllocInstr :: Platform -> Int -> [InstrSR instr] #

mkStackDeallocInstr :: Platform -> Int -> [InstrSR instr] #

data LiveInstr instr #

An instruction with liveness information.

Constructors

LiveInstr (InstrSR instr) (Maybe Liveness) 

Instances

Instances details
Outputable instr => Outputable (LiveInstr instr) # 
Instance details

Defined in RegAlloc.Liveness

Methods

ppr :: LiveInstr instr -> SDoc #

pprPrec :: Rational -> LiveInstr instr -> SDoc #

data Liveness #

Liveness information. The regs which die are ones which are no longer live in the *next* instruction in this sequence. (NB. if the instruction is a jump, these registers might still be live at the jump target(s) - you have to check the liveness at the destination block to find out).

Constructors

Liveness

registers that died because they were clobbered by something.

Fields

data LiveInfo #

Stash regs live on entry to each basic block in the info part of the cmm code.

Constructors

LiveInfo (LabelMap CmmStatics) [BlockId] (Maybe (BlockMap RegSet)) (BlockMap IntSet) 

Instances

Instances details
Outputable LiveInfo # 
Instance details

Defined in RegAlloc.Liveness

Methods

ppr :: LiveInfo -> SDoc #

pprPrec :: Rational -> LiveInfo -> SDoc #

type LiveBasicBlock instr = GenBasicBlock (LiveInstr instr) #

A basic block with liveness information.

mapBlockTop :: (LiveBasicBlock instr -> LiveBasicBlock instr) -> LiveCmmDecl statics instr -> LiveCmmDecl statics instr #

map a function across all the basic blocks in this code

mapBlockTopM :: Monad m => (LiveBasicBlock instr -> m (LiveBasicBlock instr)) -> LiveCmmDecl statics instr -> m (LiveCmmDecl statics instr) #

map a function across all the basic blocks in this code (monadic version)

mapSCCM :: Monad m => (a -> m b) -> SCC a -> m (SCC b) #

mapGenBlockTop :: (GenBasicBlock i -> GenBasicBlock i) -> GenCmmDecl d h (ListGraph i) -> GenCmmDecl d h (ListGraph i) #

mapGenBlockTopM :: Monad m => (GenBasicBlock i -> m (GenBasicBlock i)) -> GenCmmDecl d h (ListGraph i) -> m (GenCmmDecl d h (ListGraph i)) #

map a function across all the basic blocks in this code (monadic version)

stripLive :: (Outputable statics, Outputable instr, Instruction instr) => DynFlags -> LiveCmmDecl statics instr -> NatCmmDecl statics instr #

Strip away liveness information, yielding NatCmmDecl

stripLiveBlock :: Instruction instr => DynFlags -> LiveBasicBlock instr -> NatBasicBlock instr #

Strip away liveness information from a basic block, and make real spill instructions out of SPILL, RELOAD pseudos along the way.

slurpConflicts :: Instruction instr => LiveCmmDecl statics instr -> (Bag (UniqSet Reg), Bag (Reg, Reg)) #

Slurp out the list of register conflicts and reg-reg moves from this top level thing. Slurping of conflicts and moves is wrapped up together so we don't have to make two passes over the same code when we want to build the graph.

slurpReloadCoalesce :: forall statics instr. Instruction instr => LiveCmmDecl statics instr -> Bag (Reg, Reg) #

For spill/reloads

SPILL v1, slot1 ... RELOAD slot1, v2

If we can arrange that v1 and v2 are allocated to the same hreg it's more likely the spill/reload instrs can be cleaned and replaced by a nop reg-reg move.

eraseDeltasLive :: Instruction instr => LiveCmmDecl statics instr -> LiveCmmDecl statics instr #

Erase Delta instructions.

patchEraseLive :: Instruction instr => (Reg -> Reg) -> LiveCmmDecl statics instr -> LiveCmmDecl statics instr #

Patch the registers in this code according to this register mapping. also erase reg -> reg moves when the reg is the same. also erase reg -> reg moves when the destination dies in this instr.

patchRegsLiveInstr :: Instruction instr => (Reg -> Reg) -> LiveInstr instr -> LiveInstr instr #

Patch registers in this LiveInstr, including the liveness information.

reverseBlocksInTops :: LiveCmmDecl statics instr -> LiveCmmDecl statics instr #

If we've compute liveness info for this code already we have to reverse the SCCs in each top to get them back to the right order so we can do it again.

regLiveness :: (Outputable instr, Instruction instr) => Platform -> LiveCmmDecl statics instr -> UniqSM (LiveCmmDecl statics instr) #

natCmmTopToLive :: (Instruction instr, Outputable instr) => Maybe CFG -> NatCmmDecl statics instr -> LiveCmmDecl statics instr #

Convert a NatCmmDecl to a LiveCmmDecl, with empty liveness information