(x86 only, added in GHC 7.0.1) Use the SSE2 registers and instruction set to implement floating point operations when using the native code generator. This gives a substantial performance improvement for floating point, but the resulting compiled code will only run on processors that support SSE2 (Intel Pentium 4 and later, or AMD Athlon 64 and later). The LLVM backend will also use SSE2 if your processor supports it but detects this automatically so no flag is required.

SSE2 is unconditionally used on x86-64 platforms.

(x86 only, added in GHC 7.4.1) Use the SSE4.2 instruction set to implement some floating point and bit operations when using the native code generator. The resulting compiled code will only run on processors that support SSE4.2 (Intel Core i7 and later). The LLVM backend will also use SSE4.2 if your processor supports it but detects this automatically so no flag is required.