RegAlloc.Linear.Base

ghc-8.6.2: The GHC API

Safe Haskell | None
Language | Haskell2010

RegAlloc.Linear.Base

Description

Put common type definitions here to break recursive module dependencies.

Synopsis

- type BlockAssignment freeRegs = BlockMap (freeRegs, RegMap Loc)
- data Loc
  - = InReg !RealReg
  - | InMem !StackSlot
  - | InBoth !RealReg !StackSlot
- regsOfLoc :: Loc -> [RealReg]
- data SpillReason
  - = SpillAlloc !Unique
  - | SpillClobber !Unique
  - | SpillLoad !Unique
  - | SpillJoinRR !Unique
  - | SpillJoinRM !Unique
- data RegAllocStats = RegAllocStats {
  - ra_spillInstrs :: UniqFM [Int]
  }
- data RA_State freeRegs = RA_State {
  - ra_blockassig :: BlockAssignment freeRegs
  - ra_freeregs :: !freeRegs
  - ra_assig :: RegMap Loc
  - ra_delta :: Int
  - ra_stack :: StackMap
  - ra_us :: UniqSupply
  - ra_spills :: [SpillReason]
  - ra_DynFlags :: DynFlags
  }

# Documentation

type BlockAssignment freeRegs = BlockMap (freeRegs, RegMap Loc) Source #

Used to store the register assignment on entry to a basic block. We use this to handle join points, where multiple branch instructions target a particular label. We have to insert fixup code to make the register assignments from the different sources match up.

data Loc Source #

Where a vreg is currently stored A temporary can be marked as living in both a register and memory (InBoth), for example if it was recently loaded from a spill location. This makes it cheap to spill (no save instruction required), but we have to be careful to turn this into InReg if the value in the register is changed.

Constructors

InReg !RealReg | vreg is in a register
InMem !StackSlot | vreg is held in a stack slot
InBoth !RealReg !StackSlot | vreg is held in both a register and a stack slot

Instances

Eq Loc # |
Instance details Defined in RegAlloc.Linear.Base Methods (==) :: Loc -> Loc -> Bool # (/=) :: Loc -> Loc -> Bool #
Ord Loc # |
Instance details Defined in RegAlloc.Linear.Base Methods compare :: Loc -> Loc -> Ordering # (<) :: Loc -> Loc -> Bool # (<=) :: Loc -> Loc -> Bool # (>) :: Loc -> Loc -> Bool # (>=) :: Loc -> Loc -> Bool # max :: Loc -> Loc -> Loc # min :: Loc -> Loc -> Loc #
Show Loc # |
Instance details Defined in RegAlloc.Linear.Base Methods showsPrec :: Int -> Loc -> ShowS Source # show :: Loc -> String Source # showList :: [Loc] -> ShowS Source #
Outputable Loc # |
Instance details Defined in RegAlloc.Linear.Base Methods ppr :: Loc -> SDoc Source # pprPrec :: Rational -> Loc -> SDoc Source #

regsOfLoc :: Loc -> [RealReg] Source #

Get the reg numbers stored in this Loc.

data SpillReason Source #

Reasons why instructions might be inserted by the spiller. Used when generating stats for -ddrop-asm-stats.

Constructors

SpillAlloc !Unique | vreg was spilled to a slot so we could use its current hreg for another vreg
SpillClobber !Unique | vreg was moved because its hreg was clobbered
SpillLoad !Unique | vreg was loaded from a spill slot
SpillJoinRR !Unique | reg-reg move inserted during join to targets
SpillJoinRM !Unique | reg-mem move inserted during join to targets

data RegAllocStats Source #

Used to carry interesting stats out of the register allocator.

Constructors

RegAllocStats |
Fields ra_spillInstrs :: UniqFM [Int]

data RA_State freeRegs Source #

The register allocator state

Constructors

RA_State |
Fields ra_blockassig :: BlockAssignment freeRegs the current mapping from basic blocks to the register assignments at the beginning of that block. ra_freeregs :: !freeRegs free machine registers ra_assig :: RegMap Loc assignment of temps to locations ra_delta :: Int current stack delta ra_stack :: StackMap free stack slots for spilling ra_us :: UniqSupply unique supply for generating names for join point fixup blocks. ra_spills :: [SpillReason] Record why things were spilled, for -ddrop-asm-stats. Just keep a list here instead of a map of regs -> reasons. We don't want to slow down the allocator if we're not going to emit the stats. ra_DynFlags :: DynFlags