GHC.CmmToAsm.Instr

ghc-9.2.3: The GHC API

Safe Haskell | Safe-Inferred
Language | Haskell2010

GHC.CmmToAsm.Instr

Synopsis

- class Instruction instr where
  - regUsageOfInstr :: Platform -> instr -> RegUsage
  - patchRegsOfInstr :: instr -> (Reg -> Reg) -> instr
  - isJumpishInstr :: instr -> Bool
  - jumpDestsOfInstr :: instr -> [BlockId]
  - patchJumpInstr :: instr -> (BlockId -> BlockId) -> instr
  - mkSpillInstr :: NCGConfig -> Reg -> Int -> Int -> [instr]
  - mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [instr]
  - takeDeltaInstr :: instr -> Maybe Int
  - isMetaInstr :: instr -> Bool
  - mkRegRegMoveInstr :: Platform -> Reg -> Reg -> instr
  - takeRegRegMoveInstr :: instr -> Maybe (Reg, Reg)
  - mkJumpInstr :: BlockId -> [instr]
  - mkStackAllocInstr :: Platform -> Int -> [instr]
  - mkStackDeallocInstr :: Platform -> Int -> [instr]
  - pprInstr :: Platform -> instr -> SDoc
  - mkComment :: SDoc -> [instr]
- data RegUsage = RU {
  - reads :: [Reg]
  - writes :: [Reg]
  }
- noUsage :: RegUsage

# Documentation

class Instruction instr where Source #

Common things that we can do with instructions, on all architectures. These are used by the shared parts of the native code generator, specifically the register allocators.

Methods

regUsageOfInstr :: Platform -> instr -> RegUsage Source #

Get the registers that are being used by this instruction. regUsage doesn't need to do any trickery for jumps and such. Just state precisely the regs read and written by that insn. The consequences of control flow transfers, as far as register allocation goes, are taken care of by the register allocator.

patchRegsOfInstr :: instr -> (Reg -> Reg) -> instr Source #

Apply a given mapping to all the register references in this instruction.

isJumpishInstr :: instr -> Bool Source #

Checks whether this instruction is a jump/branch instruction. One that can change the flow of control in a way that the register allocator needs to worry about.

jumpDestsOfInstr :: instr -> [BlockId] Source #

Give the possible destinations of this jump instruction. Must be defined for all jumpish instructions.

patchJumpInstr :: instr -> (BlockId -> BlockId) -> instr Source #

Change the destination of this jump instruction. Used in the linear allocator when adding fixup blocks for join points.

mkSpillInstr Source #

Arguments

:: NCGConfig |
-> Reg | the reg to spill
-> Int | the current stack delta
-> Int | spill slot to use
-> [instr] | instructions

An instruction to spill a register into a spill slot.

mkLoadInstr Source #

Arguments

:: NCGConfig |
-> Reg | the reg to reload.
-> Int | the current stack delta
-> Int | the spill slot to use
-> [instr] | instructions

An instruction to reload a register from a spill slot.

takeDeltaInstr :: instr -> Maybe Int Source #

See if this instruction is telling us the current C stack delta

isMetaInstr :: instr -> Bool Source #

Check whether this instruction is some meta thing inserted into the instruction stream for other purposes.

Not something that has to be treated as a real machine instruction and have its registers allocated.

eg, comments, delta, ldata, etc.

mkRegRegMoveInstr Source #

Arguments

:: Platform |
-> Reg | source register
-> Reg | destination register
-> instr |

Copy the value in a register to another one. Must work for all register classes.

takeRegRegMoveInstr :: instr -> Maybe (Reg, Reg) Source #

Take the source and destination from this reg -> reg move instruction or Nothing if it's not one

mkJumpInstr :: BlockId -> [instr] Source #

Make an unconditional jump instruction. For architectures with branch delay slots, its ok to put a NOP after the jump. Don't fill the delay slot with an instruction that references regs or you'll confuse the linear allocator.

mkStackAllocInstr :: Platform -> Int -> [instr] Source #

mkStackDeallocInstr :: Platform -> Int -> [instr] Source #

pprInstr :: Platform -> instr -> SDoc Source #

Pretty-print an instruction

mkComment :: SDoc -> [instr] Source #

#### Instances

Instances details

Instruction Instr Source # | Instruction instance for aarch64
Instance details Defined in GHC.CmmToAsm.AArch64 Methods regUsageOfInstr :: Platform -> Instr -> RegUsage Source # patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr Source # isJumpishInstr :: Instr -> Bool Source # jumpDestsOfInstr :: Instr -> [BlockId] Source # patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr Source # mkSpillInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # takeDeltaInstr :: Instr -> Maybe Int Source # isMetaInstr :: Instr -> Bool Source # mkRegRegMoveInstr :: Platform -> Reg -> Reg -> Instr Source # takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg) Source # mkJumpInstr :: BlockId -> [Instr] Source # mkStackAllocInstr :: Platform -> Int -> [Instr] Source # mkStackDeallocInstr :: Platform -> Int -> [Instr] Source # pprInstr :: Platform -> Instr -> SDoc Source # mkComment :: SDoc -> [Instr] Source #
Instruction Instr Source # | Instruction instance for powerpc
Instance details Defined in GHC.CmmToAsm.PPC Methods regUsageOfInstr :: Platform -> Instr -> RegUsage Source # patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr Source # isJumpishInstr :: Instr -> Bool Source # jumpDestsOfInstr :: Instr -> [BlockId] Source # patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr Source # mkSpillInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # takeDeltaInstr :: Instr -> Maybe Int Source # isMetaInstr :: Instr -> Bool Source # mkRegRegMoveInstr :: Platform -> Reg -> Reg -> Instr Source # takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg) Source # mkJumpInstr :: BlockId -> [Instr] Source # mkStackAllocInstr :: Platform -> Int -> [Instr] Source # mkStackDeallocInstr :: Platform -> Int -> [Instr] Source # pprInstr :: Platform -> Instr -> SDoc Source # mkComment :: SDoc -> [Instr] Source #
Instruction Instr Source # | instance for sparc instruction set
Instance details Defined in GHC.CmmToAsm.SPARC Methods regUsageOfInstr :: Platform -> Instr -> RegUsage Source # patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr Source # isJumpishInstr :: Instr -> Bool Source # jumpDestsOfInstr :: Instr -> [BlockId] Source # patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr Source # mkSpillInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # takeDeltaInstr :: Instr -> Maybe Int Source # isMetaInstr :: Instr -> Bool Source # mkRegRegMoveInstr :: Platform -> Reg -> Reg -> Instr Source # takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg) Source # mkJumpInstr :: BlockId -> [Instr] Source # mkStackAllocInstr :: Platform -> Int -> [Instr] Source # mkStackDeallocInstr :: Platform -> Int -> [Instr] Source # pprInstr :: Platform -> Instr -> SDoc Source # mkComment :: SDoc -> [Instr] Source #
Instruction Instr Source # | Instruction instance for x86 instruction set.
Instance details Defined in GHC.CmmToAsm.X86 Methods regUsageOfInstr :: Platform -> Instr -> RegUsage Source # patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr Source # isJumpishInstr :: Instr -> Bool Source # jumpDestsOfInstr :: Instr -> [BlockId] Source # patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr Source # mkSpillInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source # takeDeltaInstr :: Instr -> Maybe Int Source # isMetaInstr :: Instr -> Bool Source # mkRegRegMoveInstr :: Platform -> Reg -> Reg -> Instr Source # takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg) Source # mkJumpInstr :: BlockId -> [Instr] Source # mkStackAllocInstr :: Platform -> Int -> [Instr] Source # mkStackDeallocInstr :: Platform -> Int -> [Instr] Source # pprInstr :: Platform -> Instr -> SDoc Source # mkComment :: SDoc -> [Instr] Source #
Instruction instr => Instruction (InstrSR instr) Source # |
Instance details Defined in GHC.CmmToAsm.Reg.Liveness Methods regUsageOfInstr :: Platform -> InstrSR instr -> RegUsage Source # patchRegsOfInstr :: InstrSR instr -> (Reg -> Reg) -> InstrSR instr Source # isJumpishInstr :: InstrSR instr -> Bool Source # jumpDestsOfInstr :: InstrSR instr -> [BlockId] Source # patchJumpInstr :: InstrSR instr -> (BlockId -> BlockId) -> InstrSR instr Source # mkSpillInstr :: NCGConfig -> Reg -> Int -> Int -> [InstrSR instr] Source # mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [InstrSR instr] Source # takeDeltaInstr :: InstrSR instr -> Maybe Int Source # isMetaInstr :: InstrSR instr -> Bool Source # mkRegRegMoveInstr :: Platform -> Reg -> Reg -> InstrSR instr Source # takeRegRegMoveInstr :: InstrSR instr -> Maybe (Reg, Reg) Source # mkJumpInstr :: BlockId -> [InstrSR instr] Source # mkStackAllocInstr :: Platform -> Int -> [InstrSR instr] Source # mkStackDeallocInstr :: Platform -> Int -> [InstrSR instr] Source # pprInstr :: Platform -> InstrSR instr -> SDoc Source # mkComment :: SDoc -> [InstrSR instr] Source #

data RegUsage Source #

Holds a list of source and destination registers used by a particular instruction.

Machine registers that are pre-allocated to stgRegs are filtered out, because they are uninteresting from a register allocation standpoint. (We wouldn't want them to end up on the free list!)

As far as we are concerned, the fixed registers simply don't exist (for allocation purposes, anyway).

Constructors

RU |
Fields reads :: [Reg] writes :: [Reg]

#### Instances

Instances details

Show RegUsage Source # |
Instance details Defined in GHC.CmmToAsm.Instr Methods showsPrec :: Int -> RegUsage -> ShowS Source # show :: RegUsage -> String Source # showList :: [RegUsage] -> ShowS Source #
Outputable RegUsage Source # | Get the registers that are being used by this instruction. regUsage doesn't need to do any trickery for jumps and such. Just state precisely the regs read and written by that insn. The consequences of control flow transfers, as far as register allocation goes, are taken care of by the register allocator. RegUsage = RU [regs] [regs]
Instance details Defined in GHC.CmmToAsm.AArch64.Instr Methods ppr :: RegUsage -> SDoc Source #

noUsage :: RegUsage Source #

No regs read or written to.