- data RegUsage = RU [Reg] [Reg]
- noUsage :: RegUsage
- data GenBasicBlock i = BasicBlock BlockId [i]
- blockId :: GenBasicBlock i -> BlockId
- newtype ListGraph i = ListGraph [GenBasicBlock i]
- type NatCmm instr = GenCmmGroup CmmStatics (BlockEnv CmmStatics) (ListGraph instr)
- type NatCmmDecl statics instr = GenCmmDecl statics (BlockEnv CmmStatics) (ListGraph instr)
- type NatBasicBlock instr = GenBasicBlock instr
- topInfoTable :: GenCmmDecl a (BlockEnv i) (ListGraph b) -> Maybe i
- entryBlocks :: GenCmmDecl a (BlockEnv i) (ListGraph b) -> [BlockId]
- class Instruction instr where
- regUsageOfInstr :: Platform -> instr -> RegUsage
- patchRegsOfInstr :: instr -> (Reg -> Reg) -> instr
- isJumpishInstr :: instr -> Bool
- jumpDestsOfInstr :: instr -> [BlockId]
- patchJumpInstr :: instr -> (BlockId -> BlockId) -> instr
- mkSpillInstr :: DynFlags -> Reg -> Int -> Int -> instr
- mkLoadInstr :: DynFlags -> Reg -> Int -> Int -> instr
- takeDeltaInstr :: instr -> Maybe Int
- isMetaInstr :: instr -> Bool
- mkRegRegMoveInstr :: Platform -> Reg -> Reg -> instr
- takeRegRegMoveInstr :: instr -> Maybe (Reg, Reg)
- mkJumpInstr :: BlockId -> [instr]
- mkStackAllocInstr :: Platform -> Int -> instr
- mkStackDeallocInstr :: Platform -> Int -> instr
Holds a list of source and destination registers used by a particular instruction.
Machine registers that are pre-allocated to stgRegs are filtered out, because they are uninteresting from a register allocation standpoint. (We wouldn't want them to end up on the free list!)
As far as we are concerned, the fixed registers simply don't exist (for allocation purposes, anyway).
The branch block id is that of the first block in the branch, which is that branch's entry point
Returns the info table associated with the CmmDecl's entry point, if any.
Return the list of BlockIds in a CmmDecl that are entry points for this proc (i.e. they may be jumped to from outside this proc).
Common things that we can do with instructions, on all architectures. These are used by the shared parts of the native code generator, specifically the register allocators.
Get the registers that are being used by this instruction. regUsage doesn't need to do any trickery for jumps and such. Just state precisely the regs read and written by that insn. The consequences of control flow transfers, as far as register allocation goes, are taken care of by the register allocator.
Apply a given mapping to all the register references in this instruction.
Checks whether this instruction is a jump/branch instruction. One that can change the flow of control in a way that the register allocator needs to worry about.
Give the possible destinations of this jump instruction. Must be defined for all jumpish instructions.
Change the destination of this jump instruction. Used in the linear allocator when adding fixup blocks for join points.
An instruction to spill a register into a spill slot.
the reg to reload.
the current stack delta
the spill slot to use
An instruction to reload a register from a spill slot.
See if this instruction is telling us the current C stack delta
Check whether this instruction is some meta thing inserted into the instruction stream for other purposes.
Not something that has to be treated as a real machine instruction and have its registers allocated.
eg, comments, delta, ldata, etc.
Copy the value in a register to another one. Must work for all register classes.
Take the source and destination from this reg -> reg move instruction or Nothing if it's not one
Make an unconditional jump instruction. For architectures with branch delay slots, its ok to put a NOP after the jump. Don't fill the delay slot with an instruction that references regs or you'll confuse the linear allocator.