Safe Haskell | None |
---|---|
Language | Haskell98 |
Carries interesting info for debugging / profiling of the graph coloring register allocator.
- data RegAllocStats statics instr
- = RegAllocStatsStart {
- raLiveCmm :: [LiveCmmDecl statics instr]
- raGraph :: Graph VirtualReg RegClass RealReg
- raSpillCosts :: SpillCostInfo
- | RegAllocStatsSpill {
- raCode :: [LiveCmmDecl statics instr]
- raGraph :: Graph VirtualReg RegClass RealReg
- raCoalesced :: UniqFM VirtualReg
- raSpillStats :: SpillStats
- raSpillCosts :: SpillCostInfo
- raSpilled :: [LiveCmmDecl statics instr]
- | RegAllocStatsColored {
- raCode :: [LiveCmmDecl statics instr]
- raGraph :: Graph VirtualReg RegClass RealReg
- raGraphColored :: Graph VirtualReg RegClass RealReg
- raCoalesced :: UniqFM VirtualReg
- raCodeCoalesced :: [LiveCmmDecl statics instr]
- raPatched :: [LiveCmmDecl statics instr]
- raSpillClean :: [LiveCmmDecl statics instr]
- raFinal :: [NatCmmDecl statics instr]
- raSRMs :: (Int, Int, Int)
- = RegAllocStatsStart {
- pprStats :: [RegAllocStats statics instr] -> Graph VirtualReg RegClass RealReg -> SDoc
- pprStatsSpills :: [RegAllocStats statics instr] -> SDoc
- pprStatsLifetimes :: [RegAllocStats statics instr] -> SDoc
- pprStatsConflict :: [RegAllocStats statics instr] -> SDoc
- pprStatsLifeConflict :: [RegAllocStats statics instr] -> Graph VirtualReg RegClass RealReg -> SDoc
- countSRMs :: Instruction instr => LiveCmmDecl statics instr -> (Int, Int, Int)
- addSRM :: (Int, Int, Int) -> (Int, Int, Int) -> (Int, Int, Int)
Documentation
data RegAllocStats statics instr Source
Holds interesting statistics from the register allocator.
RegAllocStatsStart | |
| |
RegAllocStatsSpill | |
| |
RegAllocStatsColored | |
|
(Outputable statics, Outputable instr) => Outputable (RegAllocStats statics instr) |
pprStats :: [RegAllocStats statics instr] -> Graph VirtualReg RegClass RealReg -> SDoc Source
Do all the different analysis on this list of RegAllocStats
pprStatsSpills :: [RegAllocStats statics instr] -> SDoc Source
Dump a table of how many spill loads / stores were inserted for each vreg.
pprStatsLifetimes :: [RegAllocStats statics instr] -> SDoc Source
Dump a table of how long vregs tend to live for in the initial code.
pprStatsConflict :: [RegAllocStats statics instr] -> SDoc Source
Dump a table of how many conflicts vregs tend to have in the initial code.
:: [RegAllocStats statics instr] | |
-> Graph VirtualReg RegClass RealReg | global register conflict graph |
-> SDoc |
For every vreg, dump it's how many conflicts it has and its lifetime good for making a scatter plot.
countSRMs :: Instruction instr => LiveCmmDecl statics instr -> (Int, Int, Int) Source
Count spillreloadreg-reg moves. Lets us see how well the register allocator has done.