Safe Haskell	Safe-Infered

RegAlloc.Graph.Stats

Description

Carries interesting info for debugging / profiling of the graph coloring register allocator.

Synopsis

Documentation

data RegAllocStats statics instr Source

Constructors

RegAllocStatsStart	information to help choose which regs to spill
Fields raLiveCmm :: [LiveCmmDecl statics instr] initial code, with liveness raGraph :: Graph VirtualReg RegClass RealReg the uncolored graph the partially colored graph the initial, uncolored graph raSpillCosts :: SpillCostInfo number of instrs each reg lives for
RegAllocStatsSpill	code with spill instructions added
Fields raCode :: [LiveCmmDecl statics instr] the code we tried to allocate registers for the code we tried to allocate registers for raGraph :: Graph VirtualReg RegClass RealReg the uncolored graph the partially colored graph the initial, uncolored graph raCoalesced :: UniqFM VirtualReg the regs that were coaleced the regs that were coaleced raSpillStats :: SpillStats spiller stats raSpillCosts :: SpillCostInfo number of instrs each reg lives for raSpilled :: [LiveCmmDecl statics instr]
RegAllocStatsColored	spill/reload/reg-reg moves present in this code
Fields raCode :: [LiveCmmDecl statics instr] the code we tried to allocate registers for the code we tried to allocate registers for raGraph :: Graph VirtualReg RegClass RealReg the uncolored graph the partially colored graph the initial, uncolored graph raGraphColored :: Graph VirtualReg RegClass RealReg the coalesced and colored graph raCoalesced :: UniqFM VirtualReg the regs that were coaleced the regs that were coaleced raCodeCoalesced :: [LiveCmmDecl statics instr] code with coalescings applied raPatched :: [LiveCmmDecl statics instr] code with vregs replaced by hregs raSpillClean :: [LiveCmmDecl statics instr] code with unneeded spill/reloads cleaned out raFinal :: [NatCmmDecl statics instr] final code raSRMs :: (Int, Int, Int)

Instances

(PlatformOutputable statics, PlatformOutputable instr) => PlatformOutputable (RegAllocStats statics instr)

pprStats :: [RegAllocStats statics instr] -> Graph VirtualReg RegClass RealReg -> SDoc Source

Do all the different analysis on this list of RegAllocStats

pprStatsSpills :: [RegAllocStats statics instr] -> SDoc Source

Dump a table of how many spill loads / stores were inserted for each vreg.

pprStatsLifetimes :: [RegAllocStats statics instr] -> SDoc Source

Dump a table of how long vregs tend to live for in the initial code.

pprStatsConflict :: [RegAllocStats statics instr] -> SDoc Source

Dump a table of how many conflicts vregs tend to have in the initial code.

pprStatsLifeConflict Source

Arguments

:: [RegAllocStats statics instr]
-> Graph VirtualReg RegClass RealReg	global register conflict graph
-> SDoc

For every vreg, dump it's how many conflicts it has and its lifetime good for making a scatter plot.

countSRMs :: Instruction instr => LiveCmmDecl statics instr -> (Int, Int, Int)Source

Count spillreloadreg-reg moves. Lets us see how well the register allocator has done.

addSRM :: (Num t2, Num t1, Num t) => (t, t1, t2) -> (t, t1, t2) -> (t, t1, t2)Source